Dr. Saminathan V., Jagadesh P. J., Sathosh Kumarr E., Sathish S., Sivasankaran S. (2021) “Implementation of 16-Bit Vedic Multiplier in Alu Using Verilog”, Annals of the Romanian Society for Cell Biology, pp. 9968–9975. Available at: https://annalsofrscb.ro/index.php/journal/article/view/3747 (Accessed: 30April2024).