Hash Trick Based Deep Neural Network Implementation Using Optimized Stochastic Multiplier

Abstract

Image and speech recognition has been possible now with a promising technology deep neural networks (NN). Hardware implementation of the neural networks enables significant power consumption. It is principally because of non-uniform pipeline structures and inalienable excess of various number-crunching tasks that must be performed to deliver each single yield vector. This paper gives a technique to the plan of very much improved force proficient NNs with a uniform design appropriate for equipment execution with hash tricking. An error resilience analysis was acted to decide key limitations for the design of approximate multipliers that are utilized in the subsequent design of NN. By methods of a search based approximation method, approximate multipliers showing wanted tradeoffs between the exactness and execution cost were made. Huge improvement in area effectiveness was acquired in the two cases concerning regular NNs.