Quadrature Amplitude Modulation Using Booth Multiplier with Area Efficient for Network on Chip

Abstract

The design key factors of the VLSI (Very Large-Scale Integration) are the power and delay. In this proposed method, n-Quadrature Amplitude Modulation is preferred for Booth Multiplication in network applications. Among various types of digital modulation schemes, the choice of Quadrature Amplitude Modulation is to provide both phase and amplitude modulation. The use of n-Quadrature Amplitude Modulation is to overcome the drawbacks in other types. The output and the bit rate depending on the value of n. This is efficient when compared to Quadrature Phase Shift Keying by reducing power consumption and increases the area efficiency and bandwidth. The coding is converted to Verilog HDL. Xilinx is responsible for the simulation and synthesis part of this work.